Arts, Sciences, and Engineering Electrical and Computer Engineering
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-166225 ECE 112-1 Logic Design Spring 2024 4.0 Open
Schedule:
Day Begin End Location Start Date End Date
TR 1105 AM 1220 PM Meliora Room 203 01/17/2024 05/11/2024
Enrollment: Enrolled     
55 		Capacity     
60
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MATH 162, OR MATH 141, OR MATH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-166227 ECE 112-2 Logic Design REC Spring 2024 Recitation Open
Schedule:
Day Begin End Location Start Date End Date
T 615 PM 730 PM Gavett Hall Room 310 01/17/2024 05/11/2024
Enrollment: Enrolled     
33 		Capacity     
48
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MATH 162, OR MATH 141, OR MATH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-166228 ECE 112-3 Logic Design REC Spring 2024 Recitation Closed
Schedule:
Day Begin End Location Start Date End Date
R 1230 PM 145 PM Meliora Room 206 01/17/2024 05/11/2024
Enrollment: Enrolled     
22 		Capacity     
22
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MATH 162, OR MATH 141, OR MATH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-166229 ECE 112-4 Logic Design LAB Spring 2024 Laboratory Closed
Schedule:
Day Begin End Location Start Date End Date
F 200 PM 500 PM Hopeman Hall Room 202 01/17/2024 05/11/2024
Enrollment: Enrolled     
19 		Capacity     
18
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-166230 ECE 112-5 Logic Design LAB Spring 2024 Laboratory Open
Schedule:
Day Begin End Location Start Date End Date
M 1200 PM 315 PM Hopeman Hall Room 202 01/17/2024 05/11/2024
Enrollment: Enrolled     
7 		Capacity     
18
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-166231 ECE 112-6 Logic Design LAB Spring 2024 Laboratory Open
Schedule:
Day Begin End Location Start Date End Date
W 200 PM 500 PM Hopeman Hall Room 202 01/17/2024 05/11/2024
Enrollment: Enrolled     
16 		Capacity     
18
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-166232 ECE 112-7 Logic Design LAB Spring 2024 Laboratory Open
Schedule:
Day Begin End Location Start Date End Date
T 1230 PM 315 PM Hopeman Hall Room 202 01/17/2024 05/11/2024
Enrollment: Enrolled     
12 		Capacity     
18
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-142745 ECE 112-1 Logic Design Spring 2023 4.0 Open
Schedule:
Day Begin End Location Start Date End Date
TR 1105 AM 1220 PM Meliora Room 203 01/11/2023 05/06/2023
Enrollment: Enrolled     
46 		Capacity     
60
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-142743 ECE 112-2 Logic Design REC Spring 2023 Recitation Open
Schedule:
Day Begin End Location Start Date End Date
T 615 PM 730 PM Gavett Hall Room 310 01/11/2023 05/06/2023
Enrollment: Enrolled     
30 		Capacity     
48
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-142742 ECE 112-3 Logic Design REC Spring 2023 Recitation Open
Schedule:
Day Begin End Location Start Date End Date
R 1230 PM 145 PM Meliora Room 206 01/11/2023 05/06/2023
Enrollment: Enrolled     
16 		Capacity     
22
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-142741 ECE 112-4 Logic Design LAB Spring 2023 Laboratory Open
Schedule:
Day Begin End Location Start Date End Date
F 200 PM 500 PM Hopeman Hall Room 202 01/11/2023 05/06/2023
Enrollment: Enrolled     
14 		Capacity     
18
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-142740 ECE 112-5 Logic Design LAB Spring 2023 Laboratory Open
Schedule:
Day Begin End Location Start Date End Date
M 1200 PM 315 PM Hopeman Hall Room 202 01/11/2023 05/06/2023
Enrollment: Enrolled     
9 		Capacity     
18
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-142739 ECE 112-6 Logic Design LAB Spring 2023 Laboratory Open
Schedule:
Day Begin End Location Start Date End Date
W 200 PM 500 PM Hopeman Hall Room 202 01/11/2023 05/06/2023
Enrollment: Enrolled     
16 		Capacity     
18
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer
Course Section Listing Course Course Title Term Credits Status
COURSE_SECTION-3-142738 ECE 112-7 Logic Design LAB Spring 2023 Laboratory Open
Schedule:
Day Begin End Location Start Date End Date
T 1230 PM 315 PM Hopeman Hall Room 202 01/11/2023 05/06/2023
Enrollment: Enrolled     
7 		Capacity     
18
Instructors: Selcuk Kose
Delivery Mode: In-Person
Description: Students are exposed to Combinational logic elements including all of the following: logic gates, Boolean algebra, Karnaugh Maps, conversion between number systems, binary, tertiary, octal, decimal, and hexadecimal number systems, and arithmetic on signed and unsigned binary numbers using 1's and 2's complement arithmetic. Also covered are programmable logic devices, synchronous finite state machines, State Diagrams, FPGAs and coding logic in VHDL.

Prerequisites: MTH 162, OR MTH 141, OR MTH 171
Offered: Fall Spring Summer